Strong in Digital Design Fundamentals

Expertise in Micro Architecture Development, Design, RTL Coding & Integration of IP Blocks in ASIC/SoC Designs

Very Good Understanding of Timing Requirements, Synthesis Flows and Experience in Formal Verification flows

Design for Test and Design for Debug (DFx) is a Plus

Very Good Understanding of System Level Architecture and Validation Flows

Highly Motivated Individuals and Ability to Deal with Ambiguity

Ability to work in a Team Environment

Good Hands-On Expertise in Perl, Shell, and Unix Scripting

Responsible for Functional Verification of Complex ASIC/SoCs

Create a Testplan and Coverage Plan

Develop Test Bench Including TB Components, Functional Coverage Model, Environment and Testcases and Verify the Functionality at for Block and Chip Level